1. Field of the Invention
This invention relates generally to integrated circuit packages and methods of package assembly. More particularly, the present invention pertains to the manufacture of Chip On Board devices with heat sinks for high power dissipation.
2. State of the Art
Semiconductor devices are used in a wide variety of products, including computers, automobiles, integrated circuit cards, audio/video products, and a plethora of other electronic apparatus.
Modern electronic appliances such as computers have hundreds of integrated circuits (IC) and other electronic components, most of which are mounted on printed circuit boards (PCB). Heat is generated by such components. The heat generated by many ICs and other electronic components with simple circuits may often be dissipated without an additional heat sink. However, components requiring added heat sinks are becoming more numerous as the required speed, circuit complexity, and circuit density have increased.
In particular, as semiconductor devices have become more dense in terms of electrical power consumption per unit volume, heat generation has greatly increased, requiring package construction which dissipates the generated heat much more rapidly. As the state of the art progresses, the ability to adequately dissipate heat is often a severe constraint on the size, speed, and power consumption of an integrated circuit design.
The term “heat sink” is used herein in general reference to a passive heat transfer device, for example, an extruded aluminum plate with or without fins thereon. The plate is thermally coupled to an electronic component, e.g., semiconductor die, to absorb heat from the component and dissipate the heat by convection into the air. In this application, a heat sink will be distinguished from a “heat spreader,” the latter pertaining to a member which channels heat from a semiconductor die to leads which exit the die package. However, a heat sink and a heat spreader may together be used to cool a device.
Integrated circuit devices are constructed by making, e.g., a (silicon or germanium) semiconductor die with internal and surface circuits including transistors, resistors, capacitors, etc. A single semiconductor die may contain thousands of such components and generate considerable heat. Electrical connection pads on an “active” surface of the semiconductor die are connected to the various die circuits. The integrated circuit device also includes electrical leads enabling the electrical connection pads of the semiconductor die to be connected to circuits on a PCB (or other substrate) of an appliance.
Dissipation of generated thermal energy is necessary for safe operation of an electronic appliance. An excessively high temperature of an IC may cause a circuit board fire and damage or destroy the appliance. High temperatures cause failure of the integrated circuits themselves. State of the art methods for absorbing and dissipating thermal energy from high speed Chip On Board (COB) semiconductor devices are inadequate for any or all of the following reasons: (a) insufficient heat transfer capability, (b) excessively large package size, especially the profile height, (c) complexity of manufacture, and/or (d) excessive cost.
Current methods of forming glob topped Chip On Board devices with heat sinks are shown in U.S. Pat. No. 5,552,635 of Kim et al., U.S. Pat. No. 5,477,082 of Buckley III et al., U.S. Pat. No. 5,468,995 of Higgins III, U.S. Pat. No. 5,610,442 of Schneider et al., and U.S. Pat. No. 5,659,952 of Kovac et al.
In U.S. Pat. No. 5,450,283 of Lin et al., a method for making a semiconductor device with an exposed die back side is described. The method includes providing a printed wiring board (PWB) substrate with conductive traces, on which a semiconductor die is flip mounted and connected to the conductive traces. An electrically nonconductive coupling material is placed between the die and substrate. A package body is formed around the perimeter of the die, covering a portion of the conductive traces and any portion of the coupling material extending beyond the die perimeter. The back side of the die is left exposed through the use of a thin layer of tape placed in the mold cavity prior to the transfer molding of the package body around the die to prevent the flow of molding material forming the package from flowing on the inactive back side of the die. If the thin layer of tape adheres to the die after removal of the semiconductor device from the mold cavity, the thin layer of tape is removed from the die of the semiconductor device.
A device made with multiple layers of encapsulant is shown in U.S. Pat. No. 5,379,186 of Gold et al.